Trusted Electronics

Globalized semiconductor supply chains pose risks. Without verifiable integrity, there is a threat of backdoors, undetectable vulnerabilities, and critical failures – whether in Industry 4.0, medical technology, or critical infrastructure. Trustworthy electronics provide the technological sovereignty we need to operate securely in a connected world.

At Fraunhofer AISEC, we research and develop solutions that deliver on this promise – from our CC-certified Hardware Security Lab to real-world security evaluations.

Browse our articles on this topic and discover how trustworthy electronics form the foundation for secure digital systems of the future.

Laboratory Security Evaluation of the OpenTitan Silicon Root of Trust

This post summarizes a joint hardware security evaluation of OpenTitan® engineering and production silicon by Fraunhofer AISEC in cooperation with design teams from Google, lowRISC® and Nuvoton.
The goal was to validate OpenTitan’s security under strong attack models before deployment in servers and Chromebooks. The evaluation analysed OpenTitan’s core security properties and led to several hardening measures and tooling improvements that benefit future tape-outs and deployments.

Nisha Jacob Kabakci 3. June 2026

Hardware Security in a Networked World | Threat Scenarios, Protection Against Manipulation and the Role of Trust Anchors

How can we trust the hardware that forms the backbone of our connected world? In this interview, Dr. Matthias Hiller, head of the Hardware Security department at Fraunhofer AISEC, explains how trust anchors, secure chiplets, and advanced protection mechanisms help safeguard IT systems against tampering, and why hardware security is becoming a strategic factor for Europe in the age of quantum-based threats.

Matthias Hiller 28. April 2026

Secure System-On-Chip: Protecting Operating Systems and Hardware

How can we trust chips and operating systems that power IoT, industry and the cloud? In this interview, Fraunhofer AISEC cybersecurity researcher Dr. Michael Weiß explains how GyroidOS, secure system-on-chip and open standards like RISC-V create verifiable, tamper-resistant platforms for tomorrow’s critical infrastructure.

Michael Weiß 12. March 2026

Fraunhofer AISEC commissioned by the German Federal Office for Information Security (BSI): New study on the synthesis of cryptographic hardware implementations

The study by Fraunhofer AISEC on the security of cryptographic hardware implementations focuses on physical attacks on hardware, such as side-channel attacks and fault attacks, as well as measures to defend against them. These protective mechanisms can potentially be compromised by optimizations in the chip design process. The study shows that protective measures should be integrated into complex design processes and taken into account in hardware design synthesis in order to be resilient to hardware attacks. The findings will help hardware designers to develop robust and secure chips.

Felix Oberhansl 7. November 2024