Trusted Electronics

Globalized semiconductor supply chains pose risks. Without verifiable integrity, there is a threat of backdoors, undetectable vulnerabilities, and critical failures – whether in Industry 4.0, medical technology, or critical infrastructure. Trustworthy electronics provide the technological sovereignty we need to operate securely in a connected world.

At Fraunhofer AISEC, we research and develop solutions that deliver on this promise – from our CC-certified Hardware Security Lab to real-world security evaluations.

Browse our articles on this topic and discover how trustworthy electronics form the foundation for secure digital systems of the future.

Fault Attacks on ECC Signature Verification

Digital signatures used in embedded systems are often based on elliptic curve cryptography (ECC) thanks to its performance and low memory profile. In secure boot processes they provide the cryptographic foundation for guaranteeing the authenticity of a firmware image. At the same time, these resource-constraints and the physical exposure of such devices makes them prime targets for fault attacks. Prior work studied faults on signature generation in depth, yet nobody had systematically asked how vulnerable signature verification is to fault attacks combined with carefully crafted signature inputs. That is exactly the gap we set out to close.

Kevin Schneider 20. August 2026

Cybersecurity Blog of Fraunhofer AISEC: OpenTitan Silicon Evaluation

Laboratory Security Evaluation of the OpenTitan Silicon Root of Trust

Together with Google and lowRISC®, Fraunhofer AISEC is investigating the hardware security of the OpenTitan chip (OpenTitan Silicon Root of Trust) and identifying key security vulnerabilities and hardening measures.

Nisha Jacob Kabakci 3. June 2026

Cybersecurity Blog of Fraunhofer AISEC: Circuit board

Hardware Security in a Networked World | Threat Scenarios, Protection Against Manipulation and the Role of Trust Anchors

How can hardware be protected against attacks and tampering? In an interview with the Mikroelektronik Research Factory (FMD), Dr. Matthias Hiller discusses threat scenarios, trust anchors, Europe’s challenges in securing hardware, and how Fraunhofer AISEC is helping to secure chiplets.

Matthias Hiller 28. April 2026

Secure System-On-Chip: Protecting Operating Systems and Hardware

How can we trust chips and operating systems that power IoT, industry and the cloud? In this interview, Fraunhofer AISEC cybersecurity researcher Dr. Michael Weiß explains how GyroidOS, secure system-on-chip and open standards like RISC-V create verifiable, tamper-resistant platforms for tomorrow’s critical infrastructure.

Michael Weiß 12. March 2026

Fraunhofer AISEC commissioned by the German Federal Office for Information Security (BSI): New study on the synthesis of cryptographic hardware implementations

The study by Fraunhofer AISEC on the security of cryptographic hardware implementations focuses on physical attacks on hardware, such as side-channel attacks and fault attacks, as well as measures to defend against them. These protective mechanisms can potentially be compromised by optimizations in the chip design process. The study shows that protective measures should be integrated into complex design processes and taken into account in hardware design synthesis in order to be resilient to hardware attacks. The findings will help hardware designers to develop robust and secure chips.

Felix Oberhansl 7. November 2024